An Efficient Algorithm for the Design of Combinational Circuits with Low Power Consumption
Vol. 21, No. 5, pp. 1221-1229, May 1996
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Cite this article
[IEEE Style]
김형, 최익성, 서동욱, 허훈, 황선영, "An Efficient Algorithm for the Design of Combinational Circuits with Low Power Consumption," The Journal of Korean Institute of Communications and Information Sciences, vol. 21, no. 5, pp. 1221-1229, 1996. DOI: .
[ACM Style]
김형, 최익성, 서동욱, 허훈, and 황선영. 1996. An Efficient Algorithm for the Design of Combinational Circuits with Low Power Consumption. The Journal of Korean Institute of Communications and Information Sciences, 21, 5, (1996), 1221-1229. DOI: .
[KICS Style]
김형, 최익성, 서동욱, 허훈, 황선영, "An Efficient Algorithm for the Design of Combinational Circuits with Low Power Consumption," The Journal of Korean Institute of Communications and Information Sciences, vol. 21, no. 5, pp. 1221-1229, 5. 1996.
pISSN : 1226 - 4717
eISSN : 2287 - 3880