Design and Performance Analysis of Fault Tolerant Multistage Interconnection Network with Destination Tae Algorithm
Vol. 22, No. 6, pp. 1137-1147, Jun. 1997
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Cite this article
[IEEE Style]
정종인, "Design and Performance Analysis of Fault Tolerant Multistage Interconnection Network with Destination Tae Algorithm," The Journal of Korean Institute of Communications and Information Sciences, vol. 22, no. 6, pp. 1137-1147, 1997. DOI: .
[ACM Style]
정종인. 1997. Design and Performance Analysis of Fault Tolerant Multistage Interconnection Network with Destination Tae Algorithm. The Journal of Korean Institute of Communications and Information Sciences, 22, 6, (1997), 1137-1147. DOI: .
[KICS Style]
정종인, "Design and Performance Analysis of Fault Tolerant Multistage Interconnection Network with Destination Tae Algorithm," The Journal of Korean Institute of Communications and Information Sciences, vol. 22, no. 6, pp. 1137-1147, 6. 1997.