TCP Engine Design for TCP/IP Hardware Accelerator 


Vol. 29,  No. 5, pp. 465-475, May  2004


PDF
  Abstract

Transport Control Protocol (TCP) has been implemented in software running on CPU in end systems, and the protocol processing has appeared as a new bottleneck due to advanced link technology. TCP processing is a critical issue in Storage Area Network (SAN) such as iSCSI, and the overall performance of the Storage Area Network heavily depends on speed of TCP processing. TCP Engine implemented in hardware reduces the load of CPU in end systems as well as accelerates the protocol processing, and hence high speed data processing is achieved. In this paper, we have proposed a hardware engine for TCP processing. TCP engine consists of three major blocks, TCP Connection block, Rx TCP block, and Tx TCP block. TCP Connection block is responsible for managing TCP connection states. Rx TCP block is responsible for receive flow which receives packets from network and sends to CPU. Rx TCP performs header and data processing and sends header information to TCP connection block and Tx TCP block. It also assembles out-of-ordered data to in-ordered before it transfers data to CPU. Tx TCP block is responsible for transmit flow which transfers data from CPU to network. Tx TCP performs retransmission for reliable data transfer and management of transmit window and sequence number. Various test-cases are used to verify the TCP functions. The TCP Engine is synthesized using 0.18 micron technology and results in 51K gates not including buffers for temporal data storage.

  Statistics
Cumulative Counts from November, 2022
Multiple requests among the same browser session are counted as one view. If you mouse over a chart, the values of data points will be shown.


  Cite this article

[IEEE Style]

B. Lee, Y. Jung, H. Lim, "TCP Engine Design for TCP/IP Hardware Accelerator," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 5, pp. 465-475, 2004. DOI: .

[ACM Style]

Bomi Lee, Yeojin Jung, and Hyesook Lim. 2004. TCP Engine Design for TCP/IP Hardware Accelerator. The Journal of Korean Institute of Communications and Information Sciences, 29, 5, (2004), 465-475. DOI: .

[KICS Style]

Bomi Lee, Yeojin Jung, Hyesook Lim, "TCP Engine Design for TCP/IP Hardware Accelerator," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 5, pp. 465-475, 5. 2004.

Search
(IN TITLE, AUTHOR, ABSTRACT,KEYWORDS)

Advanced Search ▼

POPULAR KEYWORDS
(TOP 10 KEYWORDS)

Recent Publications
(LAST 3 YEARS)






pISSN : 1226 - 4717
eISSN : 2287 - 3880