A New Survivor Path Memory Management Method for High-speed Viterbi Decoders 


Vol. 27,  No. 5, pp. 411-421, May  2002


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  Abstract

In this paper, we present a new survivor path memory management method and a dedicated hardware architecture for the design of high-speed Viterbi decoders in modem digital communication systems. In the proposed method, a novel use of k-starting node number deciding circuits enables to acheive the immediate traceback of the merged survivor path from which we can decode output bits, and results in smaller survivor path memory size and processing delay time than the previously known methods. Also, in the proposed method, the survivor path memory can be constructed with ease using a simple standard dual-ported memory since one read-pointer and one write-pointer, that are updated at the same rate, are required for managing the survivor path: the previously known algorithms require either complex k-ported memory structure or k-times faster read capability than write. With a moderate hardware cost for immediate traceback capability the proposed method is superior to the previously known methods for high-speed Viterbi decoding.

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  Cite this article

[IEEE Style]

J. kim and B. Kim, "A New Survivor Path Memory Management Method for High-speed Viterbi Decoders," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 5, pp. 411-421, 2002. DOI: .

[ACM Style]

Jin-Yul kim and Beomjin Kim. 2002. A New Survivor Path Memory Management Method for High-speed Viterbi Decoders. The Journal of Korean Institute of Communications and Information Sciences, 27, 5, (2002), 411-421. DOI: .

[KICS Style]

Jin-Yul kim and Beomjin Kim, "A New Survivor Path Memory Management Method for High-speed Viterbi Decoders," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 5, pp. 411-421, 5. 2002.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880