A design of HomePNA2.0 PHY. 


Vol. 27,  No. 12, pp. 1282-1287, Dec.  2002


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  Abstract

In this Paper, we present the design of IOMbps HomePNA(Home Phoneline Networking Alliance) PHY which is Home Network Technology using phone-line. It is connected with external interface through MII(Media Independent Interface) and AFE(Analog Front End) Interface. IOMbps HomePNA PHY is composed with Management Block, IEEE 802.3 CSMA/CD MAC(Media Access Control) Block, Mod ulator block and Demodulator block. For their verification, we designed a prototype FPGA PCB board using XPC860T made in Motorola. We verified HomePNA frame data transmission using a driver program based Linux kernel. we verified rate negotiation by HomepNA 2.0 Link Layer Protocol.

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  Cite this article

[IEEE Style]

S. Park, K. Koo, J. Kim, "A design of HomePNA2.0 PHY.," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 12, pp. 1282-1287, 2002. DOI: .

[ACM Style]

Seong-hee Park, Ki-jong Koo, and Jong-won Kim. 2002. A design of HomePNA2.0 PHY.. The Journal of Korean Institute of Communications and Information Sciences, 27, 12, (2002), 1282-1287. DOI: .

[KICS Style]

Seong-hee Park, Ki-jong Koo, Jong-won Kim, "A design of HomePNA2.0 PHY.," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 12, pp. 1282-1287, 12. 2002.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880