Forward Viterbi Decoder applied LVQ Network 


Vol. 29,  No. 12, pp. 1333-1339, Dec.  2004


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  Abstract

In IS-95 and IMT -2000 systems using variable code rates and constraint lengths, this paper limits code rate 1/2 and constraint length 3 and states the effective reduction of PM(path Metric) and BM(Branch Metric) memories and arithmetic comparative calculations with appling PVSL(Prototype Vector Selecting Logic) and LVQ(Learning Vector Quantization) in neural network to simplify systems and to decode forwardly.
Regardless of extension of constraint length, this paper presents the new Vierbi decoder and the applied algorithm because new structure and algorithm can apply to the exitng Viterbl decoder using only uncomplicated application and verifies the rationality of the proposed Viterbi decoder through VHDL simulation and compares the performance between the proposed Viterbi decoder and the existing.

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  Cite this article

[IEEE Style]

J. Park, "Forward Viterbi Decoder applied LVQ Network," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 12, pp. 1333-1339, 2004. DOI: .

[ACM Style]

Ji-woong Park. 2004. Forward Viterbi Decoder applied LVQ Network. The Journal of Korean Institute of Communications and Information Sciences, 29, 12, (2004), 1333-1339. DOI: .

[KICS Style]

Ji-woong Park, "Forward Viterbi Decoder applied LVQ Network," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 12, pp. 1333-1339, 12. 2004.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880