Hardware Design for Timing Synchronization of OFDM-Based WAVE Systems 


Vol. 33,  No. 4, pp. 473-478, Apr.  2008


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  Abstract

WAVE is a short-to-medium range communication standard that supports both public safety and private operations in roadside-to-vehicle and vehicle-to-vehicle communication environments. The core technology of physical layer in WAVE is orthogonal frequency division multiplexing (OFDM), which is sensitive to timing synchronization error. Besides, minimizing the latency in communication link is an essential characteristic of WAVE system. In this paper, a robust, low-complexity and small-latency timing synchronization algorithm suitable for WAVE system and its efficient hardware architecture are proposed. The comparison between proposed algorithm and other algorithms in terms of computational complexity and latency has shown the advantage of the proposed algorithm. The proposed architecture does not require RAM (Random Access Memory) which can affect the pipelining ability and high speed operation of the hardware implementation. Synchronization error rate (SER) evaluation using both Matlab and FPGA implementation shows that the proposed algorithm exhibits a good performance over the existing algorithms.

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  Cite this article

[IEEE Style]

T. Huynh, J. Kim, W. Cho, "Hardware Design for Timing Synchronization of OFDM-Based WAVE Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 4, pp. 473-478, 2008. DOI: .

[ACM Style]

Tronganh Huynh, Jinsang Kim, and Won-Kyung Cho. 2008. Hardware Design for Timing Synchronization of OFDM-Based WAVE Systems. The Journal of Korean Institute of Communications and Information Sciences, 33, 4, (2008), 473-478. DOI: .

[KICS Style]

Tronganh Huynh, Jinsang Kim, Won-Kyung Cho, "Hardware Design for Timing Synchronization of OFDM-Based WAVE Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 4, pp. 473-478, 4. 2008.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880