A New Systolic Array for LSD-first Multiplication in GF(2m


Vol. 33,  No. 4, pp. 342-349, Apr.  2008


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  Abstract

This paper presents a new digit-serial systolic multiplier over GF(2m) for cryptographic applications. When input data come in continuously, the proposed array produces multiplication results at a rate of one every [m/D] clock cycles, where D is the selected digit size. Since the inner structure of the proposed array is tree-type, critical path increases logarithmically proportional to D. Therefore, the computation delay of the proposed architecture is significantly less than previously proposed digit-serial systolic multipliers whose critical path increases proportional to D. Furthermore, since the new architecture has the features of regularity, modularity, and unidirectional data flow, it is well suited to VLSI implementations.

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  Cite this article

[IEEE Style]

C. H. Kim and I. G. Nam, "A New Systolic Array for LSD-first Multiplication in GF(2m)," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 4, pp. 342-349, 2008. DOI: .

[ACM Style]

Chang Hoon Kim and In Gil Nam. 2008. A New Systolic Array for LSD-first Multiplication in GF(2m). The Journal of Korean Institute of Communications and Information Sciences, 33, 4, (2008), 342-349. DOI: .

[KICS Style]

Chang Hoon Kim and In Gil Nam, "A New Systolic Array for LSD-first Multiplication in GF(2m)," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 4, pp. 342-349, 4. 2008.