Hardware Architecture of Timing Synchronization for IEEE 802.11n Wireless LAN Systems 


Vol. 33,  No. 11, pp. 1124-1131, Nov.  2008


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  Abstract

In this paper, we propose a timing synchronization scheme and its hardware architecture of the next generation IEEE 802.11n wireless LAN standard which is based on MIMO-OFDM technique. Proposed timing synchronization method takes two steps which consist of two modified auto-correlators. For coarse timing synchronization, a sliding window differentiator is used after a conventional auto-correlation in order to avoid plateau problem. The conjugate symmetry property of L-LTS is utilized for the simplification of fine timing synchronization. Since cross-correlation based methods are not required, the computational complexity and the number of multipliers can be reduced. In order to reduce the hardware complexity, we have used sign multipliers. Based on simulation results, the proposed method outperforms a conventional method. The proposed scheme can be applied to IEEE 802.11n systems and can easily be expanded to frequency synchronization scheme.

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  Cite this article

[IEEE Style]

J. Cho, J. Kim, W. Cho, "Hardware Architecture of Timing Synchronization for IEEE 802.11n Wireless LAN Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 11, pp. 1124-1131, 2008. DOI: .

[ACM Style]

Jongmin Cho, Jinsang Kim, and Won-Kyung Cho. 2008. Hardware Architecture of Timing Synchronization for IEEE 802.11n Wireless LAN Systems. The Journal of Korean Institute of Communications and Information Sciences, 33, 11, (2008), 1124-1131. DOI: .

[KICS Style]

Jongmin Cho, Jinsang Kim, Won-Kyung Cho, "Hardware Architecture of Timing Synchronization for IEEE 802.11n Wireless LAN Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 11, pp. 1124-1131, 11. 2008.