A Memory-Efficient Two-Stage String Matching Engine Using both Content-Addressable Memory and Bit-split String Matchers for Deep Packet Inspection 


Vol. 39,  No. 7, pp. 433-439, Jul.  2014


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  Abstract

This paper proposes an architecture of two-stage string matching engine with content-addressable memory(CAM) and parallel bit-split string matchers for deep packet inspection(DPI). Each long signature is divided into subpatterns with the same length, where subpatterns are mapped onto the CAM in the first stage. The long pattern is matched in the second stage using the sequence of the matching indexes from the CAM. By adopting CAM and bit-split string matchers, the memory requirements can be greatly reduced in the heterogeneous string matching environments.

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  Cite this article

[IEEE Style]

H. Kim and K. Choi, "A Memory-Efficient Two-Stage String Matching Engine Using both Content-Addressable Memory and Bit-split String Matchers for Deep Packet Inspection," The Journal of Korean Institute of Communications and Information Sciences, vol. 39, no. 7, pp. 433-439, 2014. DOI: .

[ACM Style]

HyunJin Kim and Kang-Il Choi. 2014. A Memory-Efficient Two-Stage String Matching Engine Using both Content-Addressable Memory and Bit-split String Matchers for Deep Packet Inspection. The Journal of Korean Institute of Communications and Information Sciences, 39, 7, (2014), 433-439. DOI: .

[KICS Style]

HyunJin Kim and Kang-Il Choi, "A Memory-Efficient Two-Stage String Matching Engine Using both Content-Addressable Memory and Bit-split String Matchers for Deep Packet Inspection," The Journal of Korean Institute of Communications and Information Sciences, vol. 39, no. 7, pp. 433-439, 7. 2014.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880