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 FPGA Design of an NB-IoT Downlink Transmitter Using a Simulink Model 


Vol. 47,  No. 12, pp. 2179-2191, Dec.  2022
10.7840/kics.2022.47.12.2179


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  Abstract

In this paper, the base station transmitter physical layer of the NB-IoT downlink was designed and implemented based on the Simulink model on the FPGA. The physical layer specification adopted is 3GPP TS36 V.15 and is designed with standalone and FDD modes assumed. The transmitter could generate subframe grids and time-domain waveforms of NPBCH, NPSS, NSSS, NPDCCH, and NPDSCH using channel parameters written in L1 interface registers by the L1 controller. In this paper, all the functions of the base station transmitter are designed by MATLAB Simulink models supporting HDL generation. The model developed using Simulink performed logic simulation, Verilog HDL generation, and FPGA In the Loop (FIL) simulation in the same Simulink environment. Then the FPGA was implemented on the Xilinx Zynq Ultrascale Development Board, and the design was validated. The implemented downlink transmitter was finally verified by receiving using Amarisoft’s NB-IoT UE emulator.

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[IEEE Style]

J. H. Kim, "FPGA Design of an NB-IoT Downlink Transmitter Using a Simulink Model," The Journal of Korean Institute of Communications and Information Sciences, vol. 47, no. 12, pp. 2179-2191, 2022. DOI: 10.7840/kics.2022.47.12.2179.

[ACM Style]

Jae Hyung Kim. 2022. FPGA Design of an NB-IoT Downlink Transmitter Using a Simulink Model. The Journal of Korean Institute of Communications and Information Sciences, 47, 12, (2022), 2179-2191. DOI: 10.7840/kics.2022.47.12.2179.

[KICS Style]

Jae Hyung Kim, "FPGA Design of an NB-IoT Downlink Transmitter Using a Simulink Model," The Journal of Korean Institute of Communications and Information Sciences, vol. 47, no. 12, pp. 2179-2191, 12. 2022. (https://doi.org/10.7840/kics.2022.47.12.2179)
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pISSN : 1226 - 4717
eISSN : 2287 - 3880