Digital Library[ Search Result ]
Search : "[ keyword: Error Correction Coding ]" (1)
Design and Implementation of a High-Reliability Min-Max Algorithm for LDPC Decoder on FPGA
Submenu
POPULAR KEYWORDS
(TOP 10 KEYWORDS)
Recent Publications
(LAST 3 YEARS)
-
Vol. 50, 2025
-
Vol. 49, 2024
- Vol. 49, No. 12 (Dec. 2024)
- Vol. 49, No. 11 (Nov. 2024)
- Vol. 49, No. 10 (Oct. 2024)
- Vol. 49, No. 9 (Sep. 2024)
- Vol. 49, No. 8 (Aug. 2024)
- Vol. 49, No. 7 (Jul. 2024)
- Vol. 49, No. 6 (Jun. 2024)
- Vol. 49, No. 5 (May. 2024)
- Vol. 49, No. 4 (Apr. 2024)
- Vol. 49, No. 3 (Mar. 2024)
- Vol. 49, No. 2 (Feb. 2024)
- Vol. 49, No. 1 (Jan. 2024)
-
Vol. 48, 2023
- Vol. 48, No. 12 (Dec. 2023)
- Vol. 48, No. 11 (Nov. 2023)
- Vol. 48, No. 10 (Oct. 2023)
- Vol. 48, No. 9 (Sep. 2023)
- Vol. 48, No. 8 (Aug. 2023)
- Vol. 48, No. 7 (Jul. 2023)
- Vol. 48, No. 6 (Jun. 2023)
- Vol. 48, No. 5 (May. 2023)
- Vol. 48, No. 4 (Apr. 2023)
- Vol. 48, No. 3 (Mar. 2023)
- Vol. 48, No. 2 (Feb. 2023)
- Vol. 48, No. 1 (Jan. 2023)
pISSN : 1226 - 4717
eISSN : 2287 - 3880