A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems 


Vol. 35,  No. 2, pp. 209-215, Feb.  2010


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  Abstract

This paper describes a design of variable-length FFT/IFFT processor (VL_FCore) for OFDM-based multi-standard communication systems. The VL_FCore adopts in-place single-memory architecture, and uses a hybrid structure of radix-4 and radix-2 DIF algorithms to accommodate various FFT lengths in the range of N=64 × 2k (0≤k≤7). To achieve both memory size reduction and the improved SQNR, a two-step conditional scaling technique is devised, which conditionally scales the intermediate results of each computational stage. The performance analysis results show that the average SQNR's of 64~8,192-point FFT's are over 60-㏈. The VL_FCore synthesized with a 0.35-㎛ CMOS cell library has 23,000 gates and 32 Kbytes memory, and it can operate with 75-㎒@3.3-V clock. The 64-point and 8,192-point FFT’s can be computed in 2.55-㎲ and 762.7-㎲, respectively, thus it satisfies the specifications of various OFDM-based systems.

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  Cite this article

[IEEE Style]

C. Yeem and K. Shin, "A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 35, no. 2, pp. 209-215, 2010. DOI: .

[ACM Style]

Chang-wan Yeem and Kyung-wook Shin. 2010. A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems. The Journal of Korean Institute of Communications and Information Sciences, 35, 2, (2010), 209-215. DOI: .

[KICS Style]

Chang-wan Yeem and Kyung-wook Shin, "A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 35, no. 2, pp. 209-215, 2. 2010.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880