@article{M634C7623,
title = "SSR: Smart Suspend/Resume Technique for High Capacity 3D NAND Flash Memory Based Storage System",
journal = "The Journal of Korean Institute of Communications and Information Sciences",
year = "2025",
issn = "1226-4717",
doi = "10.7840/kics.2025.50.9.1466",
author = "Beomjun Kim, Gyeongseob Seo, Myungsuk Kim",
keywords = "NAND flash memory, Storage system, SSD, Suspend, Resume, Erase",
abstract = "As NAND flash technology continues to scale, flash-based SSDs have become key components in storage systems. One of the main design goals for modern storage systems is low read tail latency, which is crucial for state-of-the-art applications such as data centers or LLM. Towards this goal, prior works on erase suspension address this problem by allowing a read operation to interrupt an ongoing erase operation. Unfortunately, the conventional technique attempts to suspend/resume an erase pulse at an arbitrary point, which incurs additional hardware costs for NAND peripherals and significantly reduces the SSD's lifetime.
Furthermore, the previous technique suffers from an erase/write starvation problem. To overcome these limitations, we propose a new suspend/resume technique, SSR (Smart Suspend Resume), leveraging the ISPE mechanism used in modern SSDs. The SSR introduces multiple safe points within a single erase loop based on a device model using 160 real 3D TLC flash chips, and performs suspend/resume erase operations at well-aligned safe points. By doing so, we can limit the frequency of suspend/resume operations, thus effectively avoiding reliability degradation and erase/write starvation problems. Comprehensive evaluations reveal that our SSR can improve the read tail latency up to 10 times over the baseline for two popular workloads."
}