An Efficient Partitioning-based Algorithm for the Synthesis of Low-power Combinational Circuits
Vol. 23, No. 2, pp. 400-410, Feb. 1998
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Cite this article
[IEEE Style]
최익성, 김형, 현민호, 황선영, "An Efficient Partitioning-based Algorithm for the Synthesis of Low-power Combinational Circuits," The Journal of Korean Institute of Communications and Information Sciences, vol. 23, no. 2, pp. 400-410, 1998. DOI: .
[ACM Style]
최익성, 김형, 현민호, and 황선영. 1998. An Efficient Partitioning-based Algorithm for the Synthesis of Low-power Combinational Circuits. The Journal of Korean Institute of Communications and Information Sciences, 23, 2, (1998), 400-410. DOI: .
[KICS Style]
최익성, 김형, 현민호, 황선영, "An Efficient Partitioning-based Algorithm for the Synthesis of Low-power Combinational Circuits," The Journal of Korean Institute of Communications and Information Sciences, vol. 23, no. 2, pp. 400-410, 2. 1998.
pISSN : 1226 - 4717
eISSN : 2287 - 3880