A Design of Pipelined Analog-to-Digital Converter with Multi SHA Structure 


Vol. 30,  No. 2, pp. 114-121, Feb.  2005


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  Abstract

In this paper, Pipelined A/D converter with multi SHA structure is proposed for high speed operation. The proposed structure incorporates a multi SHA block that consists of multiple SHAs of identical characteristics in parallel to improve the conversion speed. The designed multi SHA is operated by non-overlapping clocks and the sampling speed can be improved by increasing the number of multiplexed SHAs. Pipelined A/D converter, applying the proposed structure, is designed to satisfy requirement of analog front-end of VDSL modem. The measured INL and DNL of designed A/D converter are 0.52LSB～-0.50LSB and 0.80LSB~-0.76LSB, respectively. It satisfies the design specifications for VDSL modems. The simulated SNR is about 66㏈ which corresponds to a 10.7 bit resolution. The power consumption is 24.32㎽.

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  Cite this article

[IEEE Style]

S. Lee, Y. Ra, H. Shin, "A Design of Pipelined Analog-to-Digital Converter with Multi SHA Structure," The Journal of Korean Institute of Communications and Information Sciences, vol. 30, no. 2, pp. 114-121, 2005. DOI: .

[ACM Style]

Seung-Woo Lee, Yoo-Chan Ra, and Hong-Kyu Shin. 2005. A Design of Pipelined Analog-to-Digital Converter with Multi SHA Structure. The Journal of Korean Institute of Communications and Information Sciences, 30, 2, (2005), 114-121. DOI: .

[KICS Style]

Seung-Woo Lee, Yoo-Chan Ra, Hong-Kyu Shin, "A Design of Pipelined Analog-to-Digital Converter with Multi SHA Structure," The Journal of Korean Institute of Communications and Information Sciences, vol. 30, no. 2, pp. 114-121, 2. 2005.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880